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Design Simulations of Synchronous Counters with Different Modulus by Harnessing IC 74HC163


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DOI: https://doi.org/10.15866/iremos.v11i6.15703

Abstract


This paper deals with a numerical investigation using PSPICE, based on the hardware design of digital circuits, which shows a sequential behaviour. There is a large number of ready-state Integrated Circuits (IC) which can be designed by designer requirements, depending on operation cases. Before the manual hardware design, it is very important that the designed hardware is realized in order to simulate software tools, that enable the designer to prove the functionality of the designed circuit in every step during this process. The IC 74HC163 configurations are used for circuit simulation, which can be utilized as counter circuits with different modulus, according to the specific cases of the operation. Using the Computer Aided Design (CAD) systems during designing phase of digital circuits greatly improves the efficiently of digital systems depending on design requirements. The obtained results through the software tools after simulating of the designed circuits help designers to predict the performance of the new design.
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Keywords


Binary State; BCD Code; Cascade; IC 74HC163; Modulus; Sequence; Synchronous Clear; Synchronous Load; Truncated Sequence

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