Implementation of voltage controlled Multi Device Interleaved Boost Converter using FPGA
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In this paper, Multi device interleaved boost converter is studied and modeled. This converter has a high conversion ratio and achieves higher efficiency with reduced voltage and current stresses on the power semiconductor switches when compared with the conventional boost converter. Open loop and closed loop simulation with PI controller is done using MATLAB/SIMULINK and the results are compared. Hardware is done in the open loop and closed loop system using an FPGA with PI controller. Simulation results are validated with hardware results. Efficiency is obtained for different duty cycle and input voltage and compared to simulated results. A multi device structure with interleaved control is proposed to reduce the output voltage ripples with high efficiency for lesser duty cycle compared to other topologies. Experimental results are obtained for 20W, 40V prototype. The pulses are given through Spartan 6 FPGA which is programmed in VHDL coding. The paper will thoroughly show analysis and experimental verification of MDIBC.
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