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Low Power (Low Energy) FPGAs: a Survey
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Abstract
In this paper a survey of various techniques that have been used for design of a low power (low energy) Field Programmable Gate Array is presented. Recent low power configurable designs such as software radios or mobile applications require battery operated FPGAs. Furthermore, low power FPGA design is a new challenge rather than speed and area in FPGA design that has been past problems. Low power design techniques include not only process considerations but also hardware and software implementation methods. Different methods are reviewed, advantages and disadvantages of each method have been mentioned and their experimental results are provided.
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