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The Analysis of SCR-Based ESD Protection Circuit with P-Drift and N+ Floating Region


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DOI: https://doi.org/10.15866/iree.v10i4.5819

Abstract


In this paper, a novel SCR (Silicon Controlled Rectifier)-based ESD(Electrostatic Discharge) protection circuit for power clamp is proposed. The proposed protection circuit has high holding voltage due to floating n+ region which reduces current gain of parasitic bipolar transistor. This characteristic makes it ensure latch-up immunity. The electrical characteristics of the proposed ESD protection circuit have been simulated by using Synopsys TCAD simulation tool. According to the simulation results, the proposed protection circuit has high holding voltage of about 4.61V to 8.75V as design variation. Also, it is verified by using TLP (Transmission Line Pulse) system. As a result of measurement, it has holding voltage of 15.7V to 19.35V as design variation and high robustness above HBM 6kV, MM 600V.
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Keywords


ESD; SCR; Holding Voltage; HBM; MM

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References


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