Randomized Sigma-Delta Pulse Width Modulation Using FPGA for Conducted EMI Reduction in Flyback Converter

K. R. Aravind Britto; R. Vimala; K. Baskaran

doi:10.15866/iree.v9i1.219

Randomized Sigma-Delta Pulse Width Modulation Using FPGA for Conducted EMI Reduction in Flyback Converter

K. R. Aravind Britto⁽¹⁾, R. Vimala^(2*), K. Baskaran⁽³⁾

^(*) Corresponding author

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Abstract

This paper proposes randomization technique for conducted noise reduction in flyback converter. Flyback converter is the most favorite choice for low power high frequency application among the variety of Switching Power Converters (SPC). These SPC’s are the main sources of conducted noise for neighboring circuits.
The SPC should operate in accordance with the Electro-Magnetic Compatibility (EMC) rules so as to facilitate the Electro-Magnetic Interference (EMI) produced by switching the SPC. A unique combination of randomized Pulse Width Modulation (PWM) and Sigma Delta (∑-Δ) PWM technologies has been created in order to overcome the problems associated with the harmonic noise generation. Pseudo-Random Sequence Generator (PRSG) is used to provide automatic dynamic dithering for removing undesired idle tones in the output of the Sigma Delta Modulator (SDM). Field Programmable Gate Array (FPGA) based Randomized ∑-Δ PWM is used to achieve Conducted EMI reduction. Carrier frequency, duty ratio and pulse position are the three randomized parameters used to generate the triggering signals. This scheme is implemented using SPARTAN 3AN FPGA based controller for switching the flyback converter in which the experimentally investigated result shows reduction of conducted EMI in the range of 10 to 20dBµV over random PWM modulators

Keywords

EMC; EMI; Flyback Converter; FPGA; Randomized Switching Control

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References

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