Optimized Implementation of H.264/AVC Motion Estimation on a Mixed Architecture Using SynDEx-Mix
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Mixed architectures containing programmable and reconfigurable components may represent a solution to meet the growing need for processing capacity. Those architectures are so complex that their design and implementation requires long time because of the large set of possible solutions to explore. Therefore, it is necessary to use CAD tools to accelerate their design. In this context, we propose an implementation of the H.264/AVC motion estimation on an architecture composed of a Nios II processor and a Stratix 3 FPGA. This implementation is obtained using the CAD tool SynDEx-Mix that allows automatic algorithm operations partitioning/scheduling on the architecture operators and automatic generation of corresponding codes. The methodology approach is highlighted because all the operations necessary to achieve this implementation was done in two weeks.
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