Open Access Open Access  Restricted Access Subscription or Fee Access

A New Fault-Tolerant Interconnection Network


(*) Corresponding author


Authors' affiliations


DOI: https://doi.org/10.15866/irecos.v10i4.5680

Abstract


An interconnection network plays vital role for faster communication in parallel processing environment. The performance of interconnection network highly depends upon fault tolerance capability .The fault tolerance can be achieved by providing multiplicity of paths between any pair of source and destination nodes and an efficient fault tolerant routing technique. In our designing approach of a new interconnection network, these two primary objectives can be achieved. We modified the structure of fully chained combining switch multistage interconnection network so that the new modified network can tolerate multiple links or switches faults dynamically. The cost of our network is less in comparison to the existing networks.
Copyright © 2015 Praise Worthy Prize - All rights reserved.

Keywords


Multi-Stage Interconnection Network; Combining Switches Multi-Stage Interconnection Network; Fault-Tolerant Fully-Chained Combining Switches Multi-Stage Interconnection Network; Fault Tolerant Routing Algorithm; Disjoint Paths

Full Text:

PDF


References


C.R.Tripathy and R.K.Dash “A New Fault-tolerant Interconnection Topology for Parallel Systems”, in IE(I) journal-CP,pp.8-13, Vol 89,May 2008.

C.R.Tripathy and N. Adhikari on “ A New Multicomputer Interconnection Topology For Massively Parallel Systems”, International Journal of Distributed and Parallel Systems (IJDPS) Vol.2, No.4, July 2011.

N.Adhikari and C.R.Tripathy “Folded Metacube: An Efficient Large Scale Parallel Interconnection Network” IEEE International Conference on Advance Computing Conference IACC 2009,pp. 1281 – 1285.
http://dx.doi.org/10.1109/iadcc.2009.4809200

N.Adhikari and C.R.Tripathy “Mstar : A New Two Level InterconnectionNetwork “Springer-Verlag GmbH Berlin Heidelberg 2012,pp.50-61.

N.Adhikari and C.R.Tripathy “ On A New Interconnection Network for Large Scale Parallel Systems” International Journal of Computer Applications (0975 – 8887) Volume 23– No.1, June 2011,pp 39-46.
http://dx.doi.org/10.5120/2850-3656

Nian-feng Tzeng, Pen-Chung Yew and Chuan-Qi Zhu “A fault tolerant scheme for multistage interconnection network “,IEEE transaction 1985,pp 368-375.
http://dx.doi.org/10.1145/327070.327205

David B. Skillicorn “A New Class of Fault-Tolerant Static Interconnection networks”, IEEE Transactions on Computers, Vol. 31, No. 11, November 1988.
http://dx.doi.org/10.1109/12.8721

Anujan Varma, C. S. Raghavendra, “Fault-Tolerant Routing in Multistage Inter connection Networks”, IEEE Transactions on Computers, Vol. 38, No. 3, March 1989.
http://dx.doi.org/10.1109/12.21125

C.S. Raghavendra and A. Varma, “Fault-tolerant multiprocessors with redundant path interconnection networks”,IEEE Trans. Comput. C-35 (1986) 307-316.
http://dx.doi.org/10.1109/tc.1986.1676763

Naotake Kamiura, Takashi Kodera and Nobuyuki Matsui, ” Fault Tolerant Multistage Interconnection Networks with Widely Dispersed Paths”, IEEE Transaction on Computer, Vol. 50(5), (2000) pp 423-428.
http://dx.doi.org/10.1109/ats.2000.893660

Naotake Kamiura , Takashi Kodera, and Nobuyuki Matsui, “ A fault tolerant multistage interconnection network with partly duplicated switches”, Journal of Systems Architecture 47 (2002) pp.901–916.
http://dx.doi.org/10.1016/s1383-7621(01)00039-x

K. Padmanabhan, and D.H. Lawrie, “A class of redundant path multistage interconnection networks”, IEEE Trans. Comput.32 (12) (1983) pp.1099–1108.
http://dx.doi.org/10.1109/tc.1983.1676170

G.B. Adams and H.J. Siegel, “The extra stage cube: a fault-tolerant interconnection network for supercomputer systems “,IEEE Trans. Comput. 33 (11) (1984) pp. 991–1003.
http://dx.doi.org/10.1109/tc.1982.1676021

Nitin • Shruti Garhwal and Neha Srivastava, “ Designing a Fault-tolerant Fully-Chained Combining Switches Multi-stage Interconnection Network with Disjoint Paths” Journal of Supercomput (2011) 55: pp.400–431.
http://dx.doi.org/10.1007/s11227-009-0336-z

Chen CW, Chung CP (2005) Designing a disjoint path interconnection network with collision solving and fault tolerance. J Supercomput 34(1):63–80
http://dx.doi.org/10.1007/s11227-005-0327-7

Algirdas Avizenis, “Towards Systematic Design of Fault-Tolerant Systems”, IEEE Computer,Vol. 30, No. 4, , pp. 51-58 , April 1997.

Park, J.H., 2006. Two-dimensional ring-Banyan network: A high-performance fault-tolerant switching network. Elect. Lett., IEEE , vol. 42,249-251,2006.
http://dx.doi.org/10.1049/el:20062728

Meena Abarna, K.T., Venkatachalapathy, K., Priority based fault tolerant technique for wireless body area networks (WBANs), (2013) International Review on Computers and Software (IRECOS), 8 (5), pp. 1149-1155.

Chenou, J., Esterline, A.C., Edmonson, W., Capturing the dynamism of situation in the flow of information, (2014) International Review on Computers and Software (IRECOS), 9 (2), pp. 302-309.


Refbacks

  • There are currently no refbacks.



Please send any question about this web site to info@praiseworthyprize.com
Copyright © 2005-2022 Praise Worthy Prize