Parallel Implementation of a Blob Detection Algorithm on FPGA

Mohamed Ait Ali; Noureddine Zhar; Aissam Berrahou; Mohsine Eleuldj

doi:10.15866/irecos.v9i12.4985

Parallel Implementation of a Blob Detection Algorithm on FPGA

Mohamed Ait Ali^(1*), Noureddine Zhar⁽²⁾, Aissam Berrahou⁽³⁾, Mohsine Eleuldj⁽⁴⁾

^(*) Corresponding author

Authors' affiliations

DOI: https://doi.org/10.15866/irecos.v9i12.4985

Abstract

Artificial vision is widely used in many industrial, medicinal and defense application. Complex algorithms using in such applications require high processing performances to increase the system latency and to reduce resources consumption, especially those which designed for detection or tracking needs. Blob extraction algorithm appears frequently in image processing applications. In this paper, we propose a parallel implementation of a blob detection algorithm on FPGA using a new graphical tool for designing image and video processing embedded systems called VIP DESIGN (Video and Image Processing Design). The novelty of our approach is to obtain a rapid system prototyping directly from a sequential algorithm converted intuitively to a FPGA-Based parallel implementation without any knowledge about hardware concepts.
Copyright © 2014 Praise Worthy Prize - All rights reserved.

Keywords

Image Processing; Real-Time; Embedded System Design; Formal Verification

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