Efficient Hardware Implementations for Tripling Oriented Elliptic Curve Crypto-System

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This paper proposes several hardware designs and implementations for Tripling Oriented elliptic curve crypto-system (ECC) over GF (p). Projective coordinates are used to apply ECC's computations to avoid the time-consuming inversion operation. In order to improve the performance even further, parallel hardware designs to implement ECC operations in parallel are proposed. This plays a crucial role in speeding up ECC operations, compared to the known serial design. This research also presents several ECC designs by varying parallelization level for elliptic curve's computations. The purpose of this process is to provide efficient design solutions that fit different security applications according to requirements and available resources for certain application. Moreover, the NAF algorithm is used to perform scalar multiplication operation benefiting from the ability of NAF algorithm to reduce the average number of point addition operations. The proposed designs are implemented using VHDL, validated with ModelSim, and then simulated using Xilinx tool with target FPGA. The 4-PM design using homogenous coordinates achieves the best performance level for Tripling Oriented curve. Such design is significant for security applications that need high-speed ECC. Jacobean coordinates, on the other hand, shows the best performance results when applied with less parallelization levels as well as the serial design
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Elliptic Curves Cryptosystem; Time-Consumption Resources; FPGA Hardware Implementation Projective Coordinates; Security Applications

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