Online Modules Placement Algorithm on Partially Reconfigurable Device for Area Optimization


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Abstract


In this paper we propose a new method of modules placement on the partially reconfigurable device. The main aim of our method is to optimize the area occupation of the device when placing the modules. The key word of our algorithm is the not consideration of the heights and the widths of modules, like former algorithms. In fact, our algorithm uses the size of modules; next it computes the heights and the widths of modules, and after that it places them on the device while optimization the area occupation. Moreover, most of existing algorithms do not evaluate their algorithms on real hardware device; we do experimentations of our tasks on a real FPGA Virtex-5. Results show that our algorithm achieves better placement quality in term of area occupation and faster in term of run time compared to existing approaches.
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Keywords


Online Module Placement Algorithm; Partially Reconfigurable Device; FPGA

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References


A. Mtibaa, B. Ouni, M. Abid, "An efficient list scheduling algorithm for time placement problem", Computers Electrical Engineering, Volume 33 (Issue 4), pp 285-298, 2007.

Bobda Ch, "Introduction to Reconfigurable Computing Architectures, Algorithms, and Applications", Springer Netherlands, ISBN 978-1-4020-6088-5, 5 (Print) 978-1-4020-6100-4 359, 2007.

P Mahr, S Christgau, C Haubelt, C Bobda, "Integrated Temporal Planning, Module Selection and Placement of Tasks for Dynamic Networks-on-Chip", Proceeding of IEEE International Symposium on Parallel and Distributed Processing Workshops and PhD, pp 258-263, 2011.

C. Steiger, H. Walder, and M. Platzner, "Heuristics for Online Scheduling Real-Time Tasks to Partially Reconfigurable Devices", Proceeding of Field-Programmable Logic and Applications (FPL), LNCS 2778, pp. 575-584, 2003.

C. Steiger, H. Walder, and M. Platzner, "Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks", IEEE transaction on Computers, Vol. 53, No. 11, pp. 1393-1407, 2004.

Y. Chen and P. Hsiung, "Hardware Task Scheduling and Placement in Operating Systems for Dynamically Reconfigurable SoC", Proceeding of IFIP International Conference on Embedded and Ubiquitous Computing (EUC), LNCS 3824, pp. 489-498, 2005.

T.Marconi, Y. Lu, K.L.M. Bertels, and G. N. Gaydadjiev, "Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices", Proceedings of International Workshop on Applied Reconfigurable Computing (ARC), pp. 306-311, London, UK, March 2008.

Y. Lu, T. Marconi, K.L.M. Bertels, and G. N. Gaydadjiev, "Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems", Proceedings of International Workshop on Applied Reconfigurable Computing (ARC), pp. 216-230, March 2009.

X. Zhou, Y. Wang, X. Huang, and C. Peng, "On-line Scheduling of Real-time Tasks for Reconfigurable Computing System", Proceedings of the International Conference on Field-Programmable Technology (FPT), pp. 57-64, 2006.

X. Zhou,Y. Wang, X. Huang, and C. Peng, "Fast On-line Task Placement and Scheduling on Reconfigurable Devices", Proceeding of Field-Programmable Logic and Applications (FPL), pp. 132-138, 2007.

T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, "Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems", Proceedings of Design, Automation and Test in Europe (DATE), March 2008.

T. Marconi, Y. Lu, K.L.M. Bertels, G.N. Gaydadjiev, "A Novel Fast Online Placement Algorithm on 2D Partially Reconfigurable Devices", Proceedings of the International Conference on Field-Programmable Technology (FPT), December 2009

B Ouni, A Mtibaa, "Optimal placement of modules on partially reconfigurable device for reconfiguration time improvement", Microelectronics International, Vol. 29 Iss: 2, pp.101-107, 2012

B Ouni, R Ayadi, A Mtibaa, "Combining Temporal Partitioning and Temporal Placement Techniques for Communication Cost Improvement", Advances in Engineering Software, Elsevier Publishers. (ISSN: 0965-9978), Volume 42 (Issue 7), pp 444-451, 2011

T Marconi, "Efficient Runtime Management of Reconfigurable Hardware Resources", Delft University of Technology, pp 13-17, June 29, 2011

Xilinx Inc. Two flows for partial reconfiguration: module based or difference based. Xilinx Application Note XAPP290 Sep, 2004.

K. Bazargan, R. Kastner, and M. Sarrafzadeh. Fast Template Placement for Reconfigurable Computing Systems. In IEEE Design and Test of Computers, vol. 17, pp. 68-83, 2000.

Xilinx, Early Access Partial Reconfiguration User Guide UG208 (v1.1) March 6, 2006.


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