Online Modules Placement Algorithm on Partially Reconfigurable Device for Area Optimization


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Abstract


In this paper we propose a new method of modules placement on the partially reconfigurable device. The main aim of our method is to optimize the area occupation of the device when placing the modules. The key word of our algorithm is the not consideration of the heights and the widths of modules, like former algorithms. In fact, our algorithm uses the size of modules; next it computes the heights and the widths of modules, and after that it places them on the device while optimization the area occupation. Moreover, most of existing algorithms do not evaluate their algorithms on real hardware device; we do experimentations of our tasks on a real FPGA Virtex-5. Results show that our algorithm achieves better placement quality in term of area occupation and faster in term of run time compared to existing approaches.
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Keywords


Online Module Placement Algorithm; Partially Reconfigurable Device; FPGA

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