A Review on Structural Software-Based Self- Testing of Embedded Processors


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Abstract


Proposed software-based self-test (SBST) techniques for embedded processor testing recently emerged as an effective substitute to the hardware built-in self-test (BIST) and classical external tester-based testing. These SBST approaches provide the high quality at-speed testing with additional features and reduce the high cost of hardware. This paper presents a survey on the structural software-based self-testing (SBST) of embedded processors for manufacturing test. This paper goes over the main points of structural-based self-testing techniques for manufacturing and functional testing of an embedded processor (e.g. Hierarchical-based and Register-Transfer Level–based (RTL-based)). Finally, an overview of the remarkable accomplishments of SBST and the major challenges faced in making these techniques reliable for industrial processors is presented
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Keywords


Embedded Processor; SBST; ISA; RTL; Constraints; ATPG

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