Open Access Open Access  Restricted Access Subscription or Fee Access

On the Implementation of Neural Networks on FPGA Circuits: Application to Real Time Speed Control of DC Motor

C. Benbouchama(1*), S. Sakhi(2), M. Tadjine(3), A. Bouridane(4)

(1) Department of Automatic, National Polytechnic School of Algiers, Algeria
(2) Department of Automatic, National Polytechnic School of Algiers, Algeria
(3) Department of Automatic, National Polytechnic School of Algiers, Algeria
(4) Department of Automatic, National Polytechnic School of Algiers, Algeria
(*) Corresponding author

DOI's assignment:
the author of the article can submit here a request for assignment of a DOI number to this resource!
Cost of the service: euros 10,00 (for a DOI)


This paper describes an efficient implementation of neural multi-layer networks on FPGA fabric (Field Programmable Gate Array). A back-propagation algorithm was used for the training task while implementation and synthesis tools are centred on the ISE 6.3 of Xilinx with the targeted components being VirtexII and VirtexIIPro. A fixed point and a floating point number representation were used for encoding real numbers and for data processing, respectively. The realization of the activation function was carried out according to three methods, for which the results of simulation and synthesis are also presented. The implementation performances were tested using an approximation of some linear and non-linear functions. Of particular importance, an experimental evaluation involving the speed control of a DC motor is given to demonstrate the features of the adopted methodology.
Copyright © 2016 Praise Worthy Prize - All rights reserved.


Back Propagation; Control; FPGA; Implementation; Neural Networks

Full Text:



M. Skrbek, Fast neural network implementation, Neural Network World, Vol. 9, pp. 375-391, 1999.

J. G. Eldredge, FPGA Density Enhancement of a Neural Network Through Run-Time Reconfiguration, Master’s thesis, Department of Electrical and Computer Engineering, Birgham Young University, May 1994.

D. E. Rumelhart, J. L. McClelland and PDP Research Group, Parallel distributed processing: exploration in the microstructure of cognition, MIT Press, Cambridge, Massachusetts, Vol. 1, 1986.

J. J. Hopfield and D. W. Tank, Computing with neural circuits: a model, Science, Vol. 233, pp. 625-633, August 1986.

J. P. Le Bouquin, IBM Microelectronics ZISC: Zero Instruction Set Computer, Proc. World Congress on Neural Networks, San Diego, Supplement, 1994.

C.E. Cox and E. Blanz, Ganglion, a Fast Field-Programmable gate array implementation of a connectionist classifier, IEEE Journal of Solid-State Circuits, Vol. 28, pp. 288-299, 1992.

M. McKenna and B. Wilamowski, Implementing a fuzzy system on a field programmable gate array, International Joint Conference on Neural Networks (IJCNN’01), Washington DC, July 2001, pp. 189-194.

Jihan Zhu and Peter Sutton, FPGA Implementation of neural networks, a survey of a decade of progress, The University of Queensland, Brisbane, Australia, 2002.

D. N. Menard and O. Sentieys, A Methodology for evaluating the precision of fixed-point systems, International Conference on Acoustics, Speech and Signal Processing (ICASSP 2002), Orlando, May 2002.

J. L. Holt and T. E. Baker, Back propagation simulations using limited precision calculations, International Joint Conference on Neural Networks, 1991, pp. 121-126.

K. Nichols, M. Moussa and S. Areibi, Feasibility of floating point arithmetic in FPGA based artificial neural networks, 15th International Conference on Computer Applications in Industry and Engineering, San Diego, California,USA,Nov.2002,pp.8-13.

D. F. Wolf, R. A. F. Romero and E. Marques, Using embedded processors in hardware models of artificial neural networks, Proc. Simposio Brasileiro de Automao Inteligente (SBAI), 2001, pp. 78-83.

Amos R. Omondi and Jagath C. Rajapakse, FPGA Implementation of neural networks (Dordrecht, The Netherlands: Springer, 2006).

J. L. Beuchat and A. Tisserand, Opérateur en-ligne sur FPGA pour l’implémentation de quelques functions élémentaires, RENPAR’14/ASF/SYMBA, Tunisie, 2002.

M. Aumiaux, Logique binaire – Fonctions logiques et arithmétique binaire (Masson).

Ahmed Ozmen, Ferzende Tekçe and Kadir Vardar, Hardware implementation of neuro-model, Proc. International Conference on Signal Processing, 2003.

Gérard Dreyfus and al. , Réseaux de neurones: Méthodologie et applications, Algorithmes, 2 (Paris: Eyrolles, 2004).

W. T. Miller, R. S. Sutton and P. J. Werbos, Neural networks for control, MIT Press, Cambridge, Massachusetts, 1990.

K. J. Hunt, D. Sbarbaro, R. Zbikwoski, P. J. Gawthrop, Neural networks for control systems – A survey, Automatica, Vol. 28, pp. 1083-1112.

Peter J. Ashenden, The student’s guide to VHDL (San Francisco: Morgan Kaufmann, 1998).


  • There are currently no refbacks.

Please send any question about this web site to
Copyright © 2005-2020 Praise Worthy Prize