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Analysis of Stacked AHHVSCR-Based ESD Protection Circuit with High Robustness


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DOI: https://doi.org/10.15866/iree.v12i5.13704

Abstract


This paper proposes an advanced high holding voltage silicon controlled rectifier (AHHVSCR) with a new structure with an insertion of PMOS (P-type metal-oxide-semiconductor). To verify the characteristics of the proposed ESD protection circuit and analyze its operating characteristics, a comparative analysis of electrical characteristics with HHVSCR (High Holding Voltage SCR), was conducted by using TCAD simulation. HBM(Human Body Model) maximum temperature test results confirmed that the proposed ESD protection circuit has a maximum temperature value of 355K, which is about 20K lower temperature characteristic than that of HHVSCR (373K), indicating more improved robustness. In addition, the proposed ESD protection circuit was designed by applying N-STACK technology, and its applicability by voltage was verified through simulations. The proposed ESD protection circuit was designed and fabricated using 0.18um BCD process, and the validity of its electrical characteristics was confirmed using TLP (Transmission Line Pulse) system. The proposed ESD protection circuit has improved latch-up immunity with holding voltage of 18.42V, which is 7.7V higher than HHVSCR in a single structure, and it can be applied by voltage with increased holding voltage characteristics of 2-STACK 45.81V and 3-STACK 76.51V according to the application of N-STACK technology.
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Keywords


ESD Protection Circuit; SCR; Latch-Up; Holding Voltage; HBM; MM

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